The Slowest Route Sets the Clock

1Every part has a price tag. Now read the whole bill.

Here is where we stand. A gate's delay is a bucket filling through a tap — R×C, the ruler, tens of picoseconds. A wire's delay is the brigade, or the hallway: five picoseconds for a short hop, hundreds for a long haul, fresh pumps to keep it honest. Every component on the drafting plate now carries a price tag in picoseconds. Notes 08 even showed you that delays along a chain simply add.

But a chip is not one chain. It is a city of routes — thousands of signals leaving thousands of starting points at the same moment, each one riding its own sequence of gates and wires to its own destination. So the question "how fast is this circuit?" has the same shape as "how long is the morning commute?" — and the same trap. The commute is not the sum of every road in the city. It is the time along your route. And if a whole busload of signals must all arrive before anything can proceed, the city's speed is set by the slowest route anyone has to take.

That route has the name you met briefly in Notes 08, and this week it gets the full treatment:

One plain sentence, but it carries the whole week. Notice what it does not say. It does not say the average route. It does not say the longest wire or the slowest gate. A circuit full of fast parts can be slow, if one route strings too many of them together — and a circuit with one sluggish gate can be fast, if no route that matters passes through it. Speed lives in paths, not parts. Tonight we learn to walk the paths, add their bills, find the worst one — and then spend the second half of the week on what designers actually do about it.

2The metronome and the starting blocks

First, a confession about something these notes have been using casually since week 1: the clock. "3 GHz" means a metronome ticking three billion times a second — one tick every 333 picoseconds, the same 333 ps tick Notes 09 held a ruler up to. But what is the metronome for? Why does a pile of gates and wires need a beat at all?

Because the parts are not equally fast, and somebody has to say when the answers are ready to be believed. Here is the arrangement, and it is the organizing idea of every synchronous chip ever built. At the start of each route stands a small memory cell — the engineers call it a register, or a flip-flop — which does exactly one thing: at each tick of the metronome, it grabs whatever is sitting on its input and holds it steady until the next tick. That is the whole job. (How such a cell is built from gates is a week-13 story; this week we only need what it does.) A register at the start of a route is a starting block: at the tick, it releases a fresh value onto the route. A register at the end is a finish line: at the next tick, it grabs whatever has arrived.

And now the rule that makes the clock mean something — say it in words before any arithmetic touches it:

The tick period is a budget. Every gate the signal passes through spends some of it. Every wire spends some of it. If the slowest route's total bill fits inside one tick — with a little left over, as we will see — the finish-line register grabs a settled, honest answer, and the machine works. If the bill runs over, the register grabs the route mid-flip: a bucket half-full, a voltage loitering in the forbidden zone, a value that is neither the old answer nor the new one. The register will hold that garbage with perfect confidence for the rest of time. Nothing downstream can tell it was garbage. That is why this week's arithmetic is not optional bookkeeping — it is the difference between a computer and a random-number generator.

One more honest observation before the arithmetic. The metronome does not know which route is slow. It ticks at one rate for the whole chip — the laziest route and the snappiest route get the same 333 ps. So the designer's question is never "is my circuit fast on average?" It is: does the single worst route fit in the budget? Everything else could finish early and it would buy you nothing; early finishers just stand at the finish line and wait for the gun. Which is why the rest of tonight is about finding that one route.

3Walking the routes

Time to do it once, honestly, on a circuit small enough to hold in your head. The plate below is this week's specimen: three starting blocks (A, B, C), five gates, two finish lines (Y and Y2), and — because Notes 09 happened — one wire that is not a rounding error: a 2 mm haul across the block, repeaters included, carrying Notes 09's own price: 210 ps. Every other part wears the tag the last two weeks earned it: gates between 15 and 30 ps, short hops 5 ps each.

What you just did by hand — walk every route, add every tag, report the worst — is, one more time, the entire job of a static timing tool, now with the wires included. On a real chip there are billions of routes, so the tool does it with bookkeeping instead of walking, every night, for months. But every number in its report is an addition like yours. Nothing smarter.

4The allowance book

Section 3 pretended the race was only the running. It is not, and the pretending ends now. At a real finish line, three more costs come out of the same tick, and a designer keeps all of them in one ledger called the delay budget. Think of the tick period as an allowance — 333 ps at 3 GHz — and watch who takes a cut:

• The launch — about 30 ps here. The starting block is not magic: at the tick, it too is a gate flipping buckets, and its new value takes a moment to appear at its output. Engineers call it clock-to-out. The runner takes a beat to leave the blocks.
• The settle — about 20 ps here. The finish-line register's camera needs the runner standing still for a moment just before the tick fires, or the photo smears. Engineers call it setup time: the input must arrive and stop changing a little before the next tick, not at it.
• The safety margin — 10 ps here. The metronome itself is not perfectly punctual everywhere: on a chip centimeters wide, some corners hear the tick slightly late or slightly early — distance is time now, even for the clock. Engineers call the two flavors skew and jitter; we will not go deeper than this sentence. The designer just reserves a slice so the race does not depend on a perfect metronome.

So the honest version of rule (2.1), in numbers:

And there is the bad news, in public: our specimen needs 360 ps per tick, but at 3 GHz the allowance is 333 ps. The slices overflow the bar by 27 ps. The rule here is absolute, and it is the most honest rule in this course: if the slices overflow the bar, the chip does not run at that speed. Period. Not "runs a little flaky." Not "usually fine." The finish line at Y photographs a runner mid-stride, the register holds the smear forever, and the machine is wrong three billion times a second. The only legal moves are to slow the metronome — 1 ÷ 360 ps ≈ 2.78 GHz, the real speed limit of this circuit — or to shrink the slices. Shrinking the slices is section 5.

The bar is one tick at 3 GHz: 333 ps. Try all three designs. Repeaters off: the 2 mm haul runs as one unbroken brigade — Notes 09's square law, 80×2² = 320 ps — and the bill balloons to 470 ps (2.1 GHz). Repeaters on: 210 ps of wire, 360 ps total — still 27 ps over. Place the talking blocks next door and the haul collapses to a 10 ps hop: 160 ps total, and this circuit could tick at 6.25 GHz. Same logic, same gates — the floor plan moved the speed limit by a factor of three.

5When the bill is too high

Our specimen wants to run at 3 GHz and its bill says 360 ps. Every chip ever designed has lived this moment — the schedule says one speed, the critical path says a slower one — and the ways out form a short, honest menu. You already own the physics behind every item on it.

Fix 1 — buy faster parts (and read the fine print)

A gate's delay is R×C, and Notes 08 told you how to shrink the R: a bigger tap — wider transistors, more flow, faster fill. It works, and designers do it, surgically, on critical-path gates only (§3 taught you why fixing anything else is pointless). The fine print: a bigger tap has bigger plates, so it is a bigger bucket for the gate before it — push too hard and you just moved the delay upstream, while paying more area and more energy on every single flip. Faster parts are real but they run out: the returns diminish, and the energy bill (next week's whole subject) climbs the entire time.

Fix 2 — shorten the route

Two-thirds of our critical path is one wire. The cheapest picoseconds in the building are bought by moving the talking blocks closer together — Bench 4.1's "next door" toggle, which beat every other fix by a mile. Chip design calls this placement, and it is city planning, literally: put the offices that trade the most messages on the same street. Notes 09's locality lesson — keep the data near the work — was this fix wearing its software costume.

Fix 3 — fresh pumps on what must stay long

Some route always has to cross the block — somebody talks to the far side. For those, Notes 09 already handed you the tool: repeaters, chopping the brigade so delay grows in a straight line instead of as the square. Our specimen's haul already uses them (210 ps instead of a bare 320). This fix is usually applied before anyone even looks at the timing report; the bench's "repeaters off" state is what the report looks like when someone forgets.

Fix 4 — the big one: can't shorten the route? Split the race.

Now the move that changed computing. Suppose Fixes 1–3 are exhausted: the route is as short as the floor plan allows, the pumps are in, the taps are as big as the power budget tolerates — and the bill still will not fit the tick you want. You cannot make the road shorter. So instead: put a relay-exchange station in the middle of the route. That is, insert another register — a starting block that is also a finish line — partway along the path.

Look what that does to the race. The marathon from A to Y becomes two sprints: tick 1 runs A to the station, tick 2 runs the station to Y. Each tick now has to cover only a shorter leg, so the ticks can come faster — the clock is set by the slowest leg, not the slowest journey. The full journey now takes two ticks instead of one. That sounds like a loss until you notice the assembly-line fact that pays for everything: the moment the first value clears the station, the starting block launches the next value behind it. Both legs run at once, carrying different values — like a washer and dryer running different loads simultaneously. A new finished answer drops out of Y every tick. This is a pipeline, and it is how every processor you own actually runs: your laptop's "one instruction per tick" is a bucket brigade of half-finished instructions, each tick advancing all of them one station.

Read the figure's last line again, because it is the honest cost, and it is the reason "GHz" alone never tells you how fast a chip finishes your job. Pipelining raises the throughput — answers per second — but each individual answer's door-to-door time, its latency, goes up a little: every station is a real register taking its launch-and-settle cut (that is why two 195 ps sprints cost 390 ps, not 360), and the budget bar gets sliced per leg, overhead and all, once per station. A pipelined chip at 5 GHz can hand you your first answer later than a plain one at 2.8 — it just hands you the next million answers much faster. Which number you care about depends on your job, not on the advertisement.

One sentence of lore to carry out of the room: this menu is literally the story of the 2000s, when CPUs sprinted from hundreds of megahertz toward 4 GHz on ever-deeper pipelines and ever-bigger taps — until the energy bill of all those fast flips (next week's subject) and the wire bills of Notes 09 made the next gigahertz cost more than it was worth, and the industry stopped chasing ticks and started putting several slower, cooler processors on one chip instead. The GHz race ended at the power wall; your laptop has eight cores instead of a 12 GHz clock because of the arithmetic on this page.

Each bar is one leg's full bill — launch, route, settle, margin, stacked left to right — racing the copper period line. Start at the default 333 ps: the long route misses the tick and Y grabs garbage, exactly §4's overflow. Drag the period up past 360 and watch it come good: max safe clock 2.78 GHz, set by the highlighted route. Now switch the station on. The marathon splits into two sprints, the limit jumps to 5.13 GHz — and the latency readout rises from one tick to two. Drag the period down and find which sprint gives out first.

6Check yourself

Five questions, answers hidden behind each. Commit to your answer out loud before you tap.

→Work before Session 19

Session 19 is Monday, November 9. Before then:

• Review these notes. The memory test: define the critical path in one sentence from memory; name the four slices of the budget (launch, route, settle, margin); and say the honest rule about an overflowing bar out loud.
• Ten minutes per bench. On Bench 4.1, write down the max clock for all three designs before toggling, then check yourself. On Bench 5.1, find the exact period where the unpipelined circuit first goes green, then switch the station on and find the new limit — and say where the extra tick of latency physically comes from.
• Re-walk Fig 3.1's three routes on paper, tags from memory, and land on 300 / 75 / 65 ps without peeking. Then redo Route 1 with the long wire placed next door (10 ps) and find the new critical path. (Careful: it may not be Route 1 anymore.)
• Find the advertised clock speed of your own machine, turn it into a tick budget in picoseconds, and bring the number. Everything on that chip, every tick, fits inside it.

And the tease. Twice tonight the menu said "it costs power" and moved on — bigger taps, deeper pipelines, three billion flips a second, and somewhere a battery draining and a fan spinning up. Next week we follow the money: where the energy of a flip actually goes, why a chip burns power even when it computes nothing, and the trade that rules all modern design — every picosecond you buy has a price in joules, and every joule has a price in picoseconds. Notes 11 prices the other currency.

§Symbols and constants