Chaya·Edu EDU.CHAYA.DEV

Long Island University · Brooklyn · Fall 2026

The Wire Is a Place

Notes 08 priced the gates and promised that wires would get a stage of their own. Here it is. At real speeds a wire stops being a line on the drafting plate and becomes a place — somewhere the signal has to physically travel through, paying time at every step and energy for every bucket it fills along the way. By the end of these notes, moving a bit will have a price tag, and you will know why that price now shapes entire computers.

SessionsS15–S16 · Mon & Wed, Oct 26 & 28, 2026
Time6:00 – 7:50 PM, Google Meet
Notes09 of 15
ReadingNotes 08 — all of it, it is the floor we build on
This weekProject 3 specification released

1The last lie standing

Every schematic you have drawn in this course has told the same quiet lie: the wires in it are just lines. Gates got delays in Notes 08, taps and buckets and the R×C ruler — but the lines between them stayed free. Flip a node here, and the far end of its wire knows at the same instant. Even the bucket picture repeated the lie in fine print: we treated the whole node — wire plus every input hanging on it — as one bucket that fills everywhere at once. One water level for the entire node, rising together.

For a short hop between neighboring gates, that is honest. A few microns of metal really does behave like one small bucket; the whole node settles together, faster than anything else in the story. But stretch the wire — a millimeter, a centimeter, a whole chip, a whole cable — and the lie comes apart in two separate ways, and the two ways are this week's two halves:

  • The signal moves at a finite speed. Electricity is fast, but it is not instant — and modern clocks are so quick that even light-speed travel eats a visible chunk of a clock tick. The near end of a long wire can be full while the far end has not yet heard the news. (§2 and §4.)
  • A long wire is not one bucket — it is a row of buckets connected by narrow hoses. Resistance and capacitance are smeared along the metal's whole length, and the fill has to work its way down the row. That is where the painful "double the length, four times the delay" rule comes from. (§3.)

And once the trip is real, it has a fare. Moving a bit costs time (the trip) and energy (filling every bucket along the route) — and on a modern chip that fare has grown so large that moving data often costs more than computing on it. That upside-down fact (§5) explains more about the shape of modern computers than any single gate does.

This week's two sessions

Monday (S15): sections 1–3 — finite speed, the bucket brigade, and repeaters; bring Bench 3.1 up during class. Wednesday (S16): sections 4–6 — the hallway, reflections and termination, and the cost of moving a bit. Project 3's specification is released this week — same small format as P1 and P2; watch the course page.

2Nothing arrives instantly

First, kill the word "instant." A changing voltage spreads along a wire as a wave, and the wave has a speed limit: in a vacuum it would be the speed of light, about 30 cm every nanosecond. Real wires are slower, because the wave travels through the insulation around the metal, which drags on it. On a circuit board trace, the signal manages roughly 15 cm per nanosecond — about half light speed. That still sounds absurdly fast. A nanosecond is a billionth of a second; who could possibly care about 15 cm?

Your processor cares, because it does not think in nanoseconds. At 3 GHz, one clock tick is a third of a nanosecond — about 333 picoseconds. In one tick, light itself travels only about 10 cm. A signal in a board trace manages roughly 5 cm. Hold a ruler up to your laptop: the machine is three clock ticks wide, even for light. A signal cannot cross your keyboard, let alone a data center, inside one tick — not with better engineering, not ever. That is a speed limit set by physics, and every fast system you will ever touch is designed around it.

HOW FAR CAN A SIGNAL GET IN ONE CLOCK TICK? one tick at 3 GHz = 333 ps = a third of a nanosecond 0 10 cm 20 cm 30 cm light in a vacuum: 10 cm per tick — the absolute ceiling signal in a circuit-board trace: roughly 5 cm per tick signal in a bare on-chip wire: about 2 mm per tick — a sliver (§3 explains why it crawls) your laptop: about 30 cm wide — three clock ticks across, even at light speed
Fig 2.1 — One clock tick, drawn as distance. All the numbers are "roughly" — speeds vary with materials — but the shape of the problem does not: at gigahertz clocks, ordinary objects are many ticks wide. Distance is time now.

Notice the third bar, the sliver. The board trace manages 5 cm per tick, but a bare on-chip wire manages about 2 millimeters — twenty-five times worse, and nowhere near any light-speed excuse. Something else is slowing it down, something we already have the vocabulary for. That is the next section.

3The bucket brigade

Take Notes 08's picture and stretch it. A short wire was a single bucket under a single tap. Now make the wire long. The metal holds charge along its whole length — so the buckets are smeared all the way down. And the metal resists along its whole length too — so between every bucket and the next there is a stretch of narrow hose. A long wire is not one bucket. It is a bucket brigade: bucket, hose, bucket, hose, all the way to the far end, and the fill has to fight its way down the row.

SHORT WIRE — NOTES 08 WAS RIGHT LONG WIRE — A BUCKET BRIGADE the tap one bucket, one level, fills everywhere at once same tap narrow hose the fill works its way down the row — the far bucket hears the news last every extra millimeter adds a bucket AND a hose
Fig 3.1 — The same wire, told honestly at two lengths. Short: one bucket, one shared water level. Long: charge capacity and resistance smeared along the metal, so the level near the tap rises long before the far end moves at all.

Why doubling the length quadruples the delay

Here is the fact that makes long wires disproportionately painful, and here is why you should believe it with no equations at all. Double the wire's length and two things double at once: the total bucket to fill (twice the metal holds twice the charge) and the total hose the water must squeeze through (twice the metal resists twice as much). Twice the water, pushed twice as hard against you. Each doubling alone would double the delay; both together multiply — so the delay goes up four times. In ruler language: both R and C grew with length, and the ruler is R times C.

bare wire: 2× the length  →  roughly 4× the delay  (delay grows as length²)(3.1)

Feel the consequence with the house numbers. Notes 08 gave a millimeter of on-chip wire about 200 fF of bucket; it also carries very roughly a kilohm of hose. One millimeter: around 80 ps — slower than a whole gate. Two millimeters: around 320 ps — a full 3 GHz clock tick, gone, on one wire. Five millimeters: around 2,000 ps — six ticks. Nothing computed. The signal just traveled. That is why Fig 2.1's on-chip bar was a sliver: a bare long wire does not move at light speed or anything like it; it moves at bucket-brigade speed, and the brigade gets slower per step the longer it is.

Repeaters: fresh pumps along the pipeline

Chips cannot simply refuse to have long wires — some signal has to cross the die. The standard fix is almost embarrassingly direct: chop the long wire into short pieces, and put a gate between the pieces. Each little gate — called a repeater — is just an inverter or buffer from Notes 07: a fresh pump with a full-pressure tank, receiving the signal and relaunching it clean and strong into the next short segment.

Why does that win? Because the length² curse works in reverse for short wires. Cut a wire in half and each half has one quarter the delay; two quarters make a half — plus the small fixed cost of the pump in the middle. Keep the segments short and the total delay grows in a straight line with length instead of as a square. You pay a toll per pump (each repeater is a real gate with its own R×C, and real energy from the supply), but for any wire past a millimeter or two, the toll is cheap next to what the unbroken brigade would cost. Real chips are peppered with thousands of repeaters doing nothing but this.

Bench 3.1 · The brigade vs. the pumps

drag the wire longer — then switch the repeaters on
Bare wire (the brigade)
With repeaters
Segments · pumps
Double this wire →

Model: roughly 1 kΩ and 200 fF per millimeter of wire, 50 ps per repeater (Notes 08's bare gate), and we ignore the launching gate's own delay to keep your eyes on the wire. Park the slider at 2 mm, note both delays, then drag to 4 mm: the bare brigade quadruples, the pumped line roughly doubles. Then try 1 mm or less and notice repeaters buy you nothing — short wires were never the problem.

For your toolchain, in five lines

import numpy as np, matplotlib.pyplot as plt
L = np.linspace(0.1, 5, 200)                  # wire length, mm
bare = 80*L**2                                 # ps: the unbroken brigade
n = np.maximum(1, np.round(L))                 # a pump every mm, roughly
rep = 80*L**2/n + 50*(n-1)                     # short segments + pump tolls
plt.plot(L, bare); plt.plot(L, rep); plt.xlabel('mm'); plt.ylabel('ps'); plt.show()

Same model as the bench. The parabola against the near-line is the entire repeater business case, in one plot you can draw yourself.

4The hallway and the rope

The brigade story covers wires where resistance does the slowing — which is most wires inside a chip. But take a fast edge and put it on a good, fat, low-resistance wire — a board trace, a cable — and a different personality takes over. The question that decides which story you are in: how far does the signal travel during one edge? Your gates switch in tens of picoseconds; in 50 ps a board-trace signal moves under a centimeter. If the wire is much shorter than that, the whole wire sees the edge "at once" and the bucket picture is fine. If the wire is much longer — and 15 cm of board trace is forty times longer — then the edge is a short pulse of change in transit: at any instant, part of the wire has heard the news and the rest has not. The wire has become a hallway the wave travels down.

You already have perfect intuition for hallways, from ropes. Stretch a rope across a room and flick one end: a hump travels down it. Everything that matters this week is what happens when the hump reaches the far end — and that depends entirely on how the end is held:

  • End left loose (a wire going into an open, disconnected input): the hump bounces back the same way up. The energy had nowhere to go, so it turned around.
  • End tied hard to a wall (a wire shorted to ground): the hump bounces back flipped upside down. The wall yanked back.
  • End held by a hand that gives just right (a matched termination): the hump arrives and is absorbed. No bounce. The hand soaks up the energy exactly as fast as the rope delivers it.

That is the whole of transmission-line behavior, minus the algebra, and in this course we are leaving the algebra out on purpose. The bounce is called a reflection, and reflections are not a curiosity — they are a menace. A reflected edge travels back up the wire, bounces again off the sending end if that end is not matched either, and back again, each pass a little weaker: the signal rings, sloshing like water in a bathtub you kicked. And a receiver watching a ringing wire can see the voltage cross its decision threshold, fall back, and cross again — a ghost edge. One real edge sent; two or three edges seen. For a wire carrying a clock, that is catastrophic: the downstream logic counts ticks that never happened.

The cure is the third rope ending: match the end of the hallway. Engineers place a termination resistor at the end of a fast line, sized to soak up the arriving wave exactly — the "hand that gives just right." That sizing is why board designers fuss over a trace's impedance: it is the number the terminator has to match, set by the trace's shape and spacing. You will meet "50 Ω" and "controlled impedance" on every datasheet with a fast signal on it; now you know what the fuss buys — a hallway with no echoes.

Bench 4.1 · The hallway

pick how the far end is held, then send a pulse down the line
The bounce
Probe: threshold crossings
Edges actually sent1

The probe sits near the far end, like a receiving gate's input. Send a pulse at each ending and watch the strip chart. Open: the probe counts the edge twice — a ghost edge, the reflection re-crossing the threshold on its way back. Shorted: the flipped bounce drags the probe below zero — undershoot. Matched: one clean pass and silence. In a real unterminated line the bounce would bounce again off the sending end, ring after ring; the bench shows you the first echo, which is already one too many.

5What a moved bit costs

Time is only half the fare. Recall where Notes 08 said the energy goes: every bucket filled is charge drawn from the tank, and that withdrawal is paid in joules whether the bucket belongs to a gate or to a wire. Now look back at the brigade. Sending one bit down a long wire means filling every bucket along the route — two hundred femtofarads per millimeter, millimeter after millimeter — and then draining them all for the next bit. A long wire is not just slow. It is a toll road where you pay at every bucket.

Meanwhile, the thing we actually wanted — the computing — got cheap. Decades of shrinking transistors made a gate's buckets tiny, so the arithmetic itself costs almost nothing. The wires did not get shorter; chips stayed centimeters wide and memory stayed, physically, on the other side of the board. Which produces the upside-down fact of modern hardware, the one this course has been building toward since week 1:

on a modern chip, moving the data usually costs more than computing on it(5.1)
THE ROUGH ENERGY BILL FOR 64 BITS log scale — each gridline is 10× the last. Exact numbers vary by chip; the ratios are the story. 1× 10× 100× 1000× add two 64-bit numbers ≈ 1 unit — the actual work read them from nearby cache ≈ a few units — short trip, small buckets send them across the chip ≈ tens of units — a brigade's worth of buckets fetch them from main memory ≈ hundreds to a few thousand units — off the chip and back
Fig 5.1 — Roughly priced, deliberately. The add is the cheapest thing on the chart by far, and the fetch that feeds it can cost a thousand adds. Computing is cheap; delivery is expensive.

Once you believe Fig 5.1, whole swaths of computer design stop being arbitrary and start being obvious:

  • Caches exist because the second use of a value should not pay the thousand-unit fetch again. A cache is a bucket parked close to the arithmetic, precisely so the trip is short. "Locality" — keep the data near the work — is not a software nicety; it is this chart, obeyed.
  • GPUs and AI chips put memory physically close — stacked on top of or millimeters beside the compute — because when your workload is mostly moving numbers, shortening the trip beats speeding up the math.
  • "Just make the chip bigger" makes it slower, not faster: more area means longer wires, and longer wires pay the §3 square law in time and this section's toll in energy. Big chips are built as neighborhoods of small, local regions for exactly this reason.

Carry the sentence, not the numbers: arithmetic is almost free; delivery is what you pay for. When you meet a performance mystery in any later course — why the profiler blames memory, why the batch size matters, why the fast code is the one that touches less data — it will almost always be this chart wearing a costume.

6Where this bites you

Everything in these notes is visible from your desk, once you know what to look for.

Why your HDMI cable has a length limit

A video cable carries edges at billions per second down meters of hallway. Every meter costs the signal strength (long hoses, leaky buckets) and sharpens the demand for a clean, matched run — small imperfections reflect, the echoes smear neighboring bits into each other, and past a few meters a cheap passive cable simply cannot keep the edges distinguishable at full resolution. The "active" long cables that do work have a repeater hiding in the connector — a fresh pump, §3's trick, sold as an accessory.

Why motherboards have squiggly traces

Look at the traces between a CPU and its memory slots and you will find deliberate wiggles — serpentines — drawn into some of them. The memory bus sends many bits side by side, and they must arrive together: distance is time now, so a trace 3 cm shorter than its neighbors would deliver its bit about 200 ps early — most of a clock tick. The fix is beautifully literal: make the short wires longer. The wiggles are added length, tuned so every bit's hallway takes the same time to walk.

CPU memory bit A: the long way round, no choice bit B: shorter route + added wiggles = same length, same arrival time
Fig 6.1 — Length matching. The serpentine is not decoration: it is a delay, drawn in copper, equalizing two hallways so the bits walking them arrive in step.

Why the far side of the chip is "far"

Inside the processor, the same rules: a signal that must cross the die rides repeater-studded highways and still takes multiple clock ticks to arrive — the designers plan for the trip like a shipping schedule. The clean week-7 picture of "gates wired to gates" survives, but every wire in it now carries a price tag: a delay from §3, a ringing risk from §4, and an energy bill from §5. Next week we start adding those tags up.

7Check yourself

Five questions, answers hidden behind each. Commit to your answer out loud before you tap.

A bare on-chip wire is doubled in length. Why does its delay go up four times rather than two?

Because two things doubled at once. Twice the metal is twice the bucket to fill (more C) and twice the hose to push through (more R). Each doubling alone would double the delay; the ruler multiplies them — R×C — so together they quadruple it. That is the length² law, and it is why long wires are disproportionately painful rather than just proportionally slow.

Repeaters do not remove a single bucket from the wire — the metal is all still there. What exactly do they buy?

They break one long brigade into several short ones, and short brigades are cheap: half the length means a quarter of the delay per piece. Four quarter-delay pieces cost one quarter of the original each — the squares work for you now — plus a small fixed toll per pump. The total grows roughly in a straight line with length instead of as length². You pay in gates and in energy (every pump draws from the tank) to stop paying in squares.

In the rope picture: which ending is the shorted wire, which is the open one, and what does each do to the pulse?

Tied hard to the wall = shorted: the end cannot move, the wall yanks back, and the pulse bounces back flipped. Left loose = open: the energy has nowhere to go and the pulse bounces back the same way up. Held by a hand that gives just right = matched termination: the pulse is absorbed and nothing comes back. Matching the end of the hallway is the entire purpose of a termination resistor.

A receiver on a long unterminated line reports two rising edges when the sender swears it sent one. What happened, and what is the fix?

The edge reached the unmatched far end and reflected; the echo traveled back and re-crossed the receiver's decision threshold — a ghost edge. On a clock line this makes downstream logic count ticks that never happened. The fix is to match the line: a termination resistor sized to the line's impedance soaks up the arriving wave, so the edge passes once and nothing bounces. (Bench 4.1 is this question, animated.)

Why is adding two numbers often cheaper than fetching them — and what do caches have to do with it?

The adder is tiny and local: its buckets are a few gates' worth, sitting right there. The fetch fills a brigade of wire buckets across the chip, and a trip to main memory leaves the chip entirely and comes back — hundreds to thousands of times the adder's energy, and far more time. A cache is a bucket of recently used data parked next to the arithmetic so the second use pays a short trip instead of the full fare. Locality is Fig 5.1, obeyed.

A colleague proposes doubling the chip's area to "fit more logic and go faster." Using only this week's ideas, what goes wrong?

More area means longer wires. The bare-wire delay grows with the square of length, so crossing signals get slower much faster than the chip got bigger; the energy per trip grows with every added bucket; and at 3 GHz even light-speed travel covers only about 10 cm per tick, so a physically bigger die is more ticks wide no matter how good the wires get. Bigger chips are built as neighborhoods of small local regions precisely because "bigger" and "faster" pull in opposite directions.

→Work before Session 17

Session 17 is Monday, November 2. Before then:

  • Review these notes. The memory test: draw the brigade from scratch and say why doubling length quadruples delay; then draw the three rope endings and name what each one does to the pulse.
  • Ten minutes per bench. On Bench 3.1, read the bare and pumped delays at 2 mm and 4 mm and check the ×4 vs ×2 with your own eyes. On Bench 4.1, send a pulse at all three endings and say out loud, before each one, what the probe will see.
  • Run the five-line plot from §3 and find the length where the repeatered line first beats the bare wire. Bring the number.
  • Find one serpentine trace in a photo of any motherboard (they are everywhere) and be ready to explain to the class what it is for in one sentence.

Project 3 · spec out this week

Project 3's specification is released this week — same small format as the first two: a short mission built straight on these notes and Notes 08, about thirty minutes of work, a link and a screenshot to hand in. Watch the course page.

And the tease, since every wire and every gate now carries a price tag: next week we stop pricing parts and start pricing paths. Notes 10 adds up the bill along the slowest route through a real circuit — the critical path from Notes 08, now with wires included — and finds out what actually sets a chip's clock speed, and what designers do when the bill comes in too high.

§Symbols and constants

Symbol / termMeaningValue / units
cSpeed of light — the ceiling for any signal≈ 30 cm per ns (≈ 10 cm per 3 GHz tick)
board-trace speedSignal speed in a PCB trace, dragged by the insulationroughly 15 cm per ns — about half of c
r, c (per mm)A wire's hose and bucket, smeared per millimeterroughly 1 kΩ and 200 fF per mm on-chip (Notes 08)
length² lawBare-wire delay vs. length: both R and C grow, and the ruler multiplies them2× length → ≈ 4× delay; bench model: 80·L² ps
repeaterA fresh pump mid-wire: a buffer splitting the brigade into short segments≈ 50 ps each in the bench; makes delay grow ≈ linearly
reflectionThe bounce off an unmatched end of a fast lineopen end: same way up · shorted end: flipped
terminationThe hand that gives just right: a resistor matched to the line, absorbing the waveno bounce, no ringing, no ghost edges
ghost edgeA reflection re-crossing a receiver's threshold: one edge sent, several seenthe failure termination exists to prevent