Representing a Bit

1One bit, held by matter

Notes 01 ended one level too high. We talked about gates promising each other valid voltages, and about restoration wiping out errors at every stage — but a gate can only restore a bit that still exists when the gate looks at it. So go all the way down. Forget logic; consider one bit, held by one physical system, and ask what it takes to be sure it is still there when you come back to read it.

Two requirements, and they are in tension. The states must be distinguishable: whatever measurement you make must give reliably different results for 0 and for 1. And the states must be stable: the system must not wander from one to the other on its own. The universal enemy of both is thermal agitation. Every particle in the device is jiggling with a characteristic energy scale of k_BT, and at room temperature

That number, about 26 millielectronvolts, is the single most useful constant in this course. It is the size of the random energy kicks the environment delivers to your device, for free, continuously, whether you want them or not. Nothing in this room is standing still. The atoms in your desk are vibrating, the electrons in every wire are diffusing in all directions at once, and each of them carries roughly this much kinetic energy. A bit is a small island of order defended against that traffic, and both of tonight's questions — can I tell the states apart, and will the state stay put — come down to how much bigger than k_BT you are willing to make something.

Hold on to the distinction between the two requirements, because they fail differently. A failure of distinguishability is a read error: the bit is fine, but the measurement lied. A failure of stability is a storage error: the bit itself flipped, and every subsequent read will faithfully report the wrong value. Restoration, the great trick of Notes 01, repairs the first kind and is helpless against the second — a restoring gate that reads a flipped bit will drive it, cleanly and with conviction, to the wrong rail.

2What counts as distinguishable

Start with reading, because it is the requirement people think is trivial. To read a bit you measure some observable of the system — a voltage, a current, a resistance, a reflected intensity. If the device were at absolute zero, state 0 would give exactly one value and state 1 exactly another, and any nonzero separation would do. At any real temperature, every measurement rides on top of the thermal jiggling of section 1, plus whatever the measuring apparatus adds. Measure the same state a thousand times and you get a thousand slightly different numbers: a distribution, centered on the nominal value, with some spread σ.

So the honest picture of one bit under measurement is two overlapping distributions: a hill of possible readings centered on the 0 value, another centered on the 1 value, separated by Δ. To decide what you saw, you place a threshold between them — readings below it you call 0, above it you call 1. The bit is misread whenever a fluctuation carries a reading across the threshold. That area of overlap is not a defect of a sloppy instrument; it is present in every readout of every bit in every technology, and its size is set by a single dimensionless number, Δ/σ — the separation measured in units of the fluctuation.

When the fluctuations are the sum of many small independent disturbances — and thermal noise is exactly that — the distributions are Gaussian, and the misread probability has a closed form:

You do not need to memorize the error function; you need to know how this expression behaves, because its behavior is the whole game. It falls off like a Gaussian tail — faster than exponentially in Δ/σ. At Δ = 2σ the two hills overlap heavily and roughly one read in six is wrong: useless. At Δ = 6σ, about one in a thousand. At Δ = 12σ, one in a billion — and each further σ of separation buys more than an order of magnitude beyond that. Distinguishability is therefore not a yes-or-no property. It is a purchasable quantity, priced in signal separation, and the price of astonishing reliability is surprisingly low — provided you can afford the first few multiples of σ.

The shaded tails are the misread probability — the part of each distribution that falls on the wrong side of the threshold. Push Δ/σ toward the top of the range and watch the error readouts collapse: past Δ ≈ 12σ every additional σ of separation multiplies the mean time between errors by more than an order of magnitude. Reliability is cheap in this direction; that is why digital works.

Connect this to Notes 01. The four voltage thresholds of the static discipline are how a logic family engineers Δ: V_OH − V_OL is the separation the family promises, and the noise margins are the slack it holds in reserve. What the family cannot legislate is σ — that comes from physics, and next week we will compute it for the most important case, a voltage held on a capacitance, where it lands within reach of aggressive designs. When you hear that a technology "does not scale," a good first translation is: Δ shrank with the geometry, σ did not, and the ratio fell below the reliability target.

3The barrier model

Now the second requirement: the state must stay put between the write and the read. A system left to itself relaxes toward thermal equilibrium, and thermal equilibrium is precisely the condition of having forgotten everything — equilibrium is the same regardless of history, which is another way of saying it stores no information. A useful bit is a system held out of equilibrium in one of two persistent conditions. The standard way to arrange that is to separate the two states with an energy barrier of height E_b.

Picture a double well: two valleys, one hill between them, the system resting in one valley. The horizontal axis is a configuration coordinate — whatever physical quantity actually embodies the bit: the charge on a storage node, the angle of a magnetization, the position of a beam. The valleys are the two legal states; the hill is everything in between, which you may recognize as the physical original of the forbidden zone from Notes 01. To flip the bit deliberately, you supply enough energy to lift the system over the hill. To flip it accidentally, thermal noise has to do the same thing by chance.

How often does chance succeed? The system rattles around in its valley, testing the walls at some attempt frequency f₀ set by its internal dynamics — for the systems we care about, typically 10¹² to 10¹³ times per second. Each attempt succeeds with the probability that a thermal fluctuation happens to be carrying energy E_b or more, and Boltzmann statistics — which week 3 develops properly — gives that probability its famous exponential form:

The exponential is the important part. Barrier height buys you reliability at an enormous exchange rate: every additional k_BT of barrier cuts the escape rate by a factor of e, so a barrier of 40 k_BT is not twice as good as 20 k_BT — it is about 500 million times better. This is the storage-side twin of the Gaussian tail in section 2, and it is the second appearance of the deepest pattern in this course: reliability is exponentially cheap in the stabilizing resource. Modest, affordable investments of energy buy absurd levels of dependability. Computing works at all because nature offers this bargain.

Attempt frequency fixed at f₀ = 10¹³ Hz. The barrier is drawn to scale against the thermal energy k_BT, shown as the dashed line. Slide the temperature and watch the same physical barrier change its meaning.

Notice what the logarithm did in that example. Demanding ten years instead of ten nanoseconds — a factor of 10¹⁷ in hold time — raised the required barrier by a factor of about five. Requirements that sound wildly different in engineering terms collapse to modest differences in barrier height, because the barrier enters through an exponential and comes back out through a logarithm. Week 3 turns this observation into the course's first design equation, relating barrier height, temperature, hold time, and a target error probability — and Project 1 asks you to verify it against a model you build yourself.

4Stability vs. changeability: the write problem

Here is the trap hiding in section 3. Suppose you take reliability seriously and surround your bit with a 50 k_BT barrier. Excellent: thermal noise will not cross it in a decade. But now you have to cross it, every time you write. Whatever mechanism you use to flip the bit must deliver enough energy to clear the hill that was built specifically so that nothing could clear it. A bit that is perfectly protected is perfectly read-only; a bit that is easy to write is easy for the environment to write too. Stability and changeability are the same property, seen from opposite sides of the barrier.

The resolution is not a compromise barrier height — that would buy you a bit that is both unreliable and sluggish. The resolution is a barrier that moves on command. During storage the barrier stands tall. During a write, a control input temporarily lowers it (or tilts the landscape so that one valley drains into the other), an external driver pushes the system into the target valley, and then the barrier is restored before the environment can exploit the opening. The bit is vulnerable only during the brief, deliberate window when it is supposed to be.

Figure 4.1 · The write cycle in the barrier model. The bit is exposed to noise only inside the deliberate window when the barrier is down — which is why write operations, across all technologies, are when errors happen.

This demands something structural: a third terminal. A system with only the two state-holding degrees of freedom cannot lower its own barrier — the lowering must be commanded by a separate input that is not itself the stored value. In a DRAM cell, the access transistor's gate is that third terminal: raise the word line and the barrier between the storage node and the bit line collapses; lower it and the barrier is rebuilt. In flash, a high field across the oxide makes the barrier effectively thin enough to pass charge. In a magnetic cell, a field or a spin current tilts the energy landscape until one valley disappears.

And now notice what we have accidentally built. A device whose state changes only when another signal says so is a conditional state change — and conditional state change is the atom of computation. An unconditional flip is a clock, a metronome, a piece of physics; a flip that happens because some other quantity crossed a threshold is an if. When we reach week 6 and ask what makes a physical device usable as a switch, we will be re-asking tonight's question one level up — and the transistor's answer, a channel barrier raised and lowered by a gate voltage, is exactly the answer in figure 4.1.

5Three physical bits, one model

The claim implicit in all of this is that the double well is not a metaphor but a portable analytical tool: point at any storage technology, real or proposed, and you should be able to say what the configuration coordinate is, where the valleys are, what supplies the barrier, what lowers it, and what reads the state. Here is that exercise for four technologies you already own.

Three of these repay a closer look, because each exposes a different face of the model.

Charge on a capacitance: the leaky valley

The DRAM cell is the course's favorite specimen because every number in it is accessible. Charged to 1 V, a 25 fF node holds 25 fC — about 156,000 electrons standing between you and a wrong answer. Its barrier, though, is not a fixed property of a material; it is the off-state of a transistor, and no transistor turns off completely. A trickle of leakage current drains the valley continuously, so the DRAM well is tilted: left alone, the stored 1 slides toward 0 on a timescale of tens of milliseconds. The engineering response is to re-write every cell on a fixed schedule — refresh — which is restoration from Notes 01 applied to storage, and a standing energy tax paid against leakage. Exercise 4 puts numbers on exactly this budget.

Magnetization: the barrier that scales away

A magnetic grain's barrier is anisotropy energy times grain volume, E_b = K_uV. Volume is the operative word: shrink the grain to pack more bits per platter and the barrier shrinks with it, until around 40–60 k_BT the grain begins flipping spontaneously on product timescales — the superparamagnetic limit, and the reason areal density stopped doubling on schedule in the mid-2000s. It is the cleanest real-world example of the scaling trap from Notes 01's trade table: making the device smaller quietly lowered E_b/k_BT, and the exponential did the rest. Heat-assisted recording, the industry's answer, is figure 4.1 verbatim: a laser briefly raises T (equivalently, lowers E_b/k_BT) at the one grain being written, then lets it cool back to stability.

The mechanical bit: an extreme corner

A buckled MEMS beam holds its state behind an elastic barrier vast compared with k_BT — retention is effectively geological. The price appears on the other axes: moving a physical mass over the barrier takes microseconds and mechanical contacts wear out. The relay is a bit that has bought robustness with speed, exactly the trade Notes 01's section 6 table predicted, and it is a useful mental bracket: every practical technology lives between the leaky-but-fast DRAM valley and the eternal-but-slow mechanical one.

What should impress you is that one diagram — two valleys, one hill, a movable barrier — organized four technologies that share no physics at the device level: electrostatics, quantum tunneling, ferromagnetism, elasticity. That portability is what it means for a model to be good, and it is the reason Project 1 has you build the model rather than any one device.

6Project 1 opens this week

The specification for Project 1 — Bit Representation and Noise Analysis is released in the course repository this week, and it is precisely tonight's material made computational: build a model of a bit held by an energy barrier, subject it to thermal noise, and determine the minimum barrier height and switching energy required to meet a specified error rate at a specified temperature. The deliverable is your model — Python with NumPy, in your project repository with the commit history showing your path — plus a written analysis relating what the model does to the thermal-noise limits we develop in week 3 and to the behavior of the real devices in section 5.

Read the specification before Session 3, not because work is due — it is not, until week 5 — but because week 3's material on Boltzmann statistics, error rates, and switching energy is the theory your model exists to check, and it lands differently when you know what you are going to have to build with it. Bench 3.1 above is, in miniature, the closed-form half of the project; your job will be to get the same answers out of a simulation that never saw the formula.

7Work before Session 3

Session 3 is Monday, September 14. Before we meet:

• Review Notes 01 and these notes. The pair travels together: Notes 01 is why the abstraction works, these notes are what it stands on.
• Read the Project 1 specification, released this week in the course repository. Bring questions to Session 3 — the first twenty minutes belong to them.
• Confirm your toolchain from Session 1 actually runs: you will use NumPy and Matplotlib in anger from week 3 on.
• Work the exercises below, especially exercise 2 — it is the calculation at the center of Project 1.
• Optional: find the retention specification of any flash device you own (drive datasheets state it) and check it against Worked example 3.1's arithmetic.

8Exercises

Not graded. Bring answers or stuck points to Session 3.

1. Compute k_BT in eV at 77 K (liquid nitrogen) and at 4 K (liquid helium). By what factor does a fixed barrier of 0.5 eV improve in reliability going from 300 K to 77 K?
2. A storage node must hold its bit for one week at 350 K with escape probability below 10⁻⁶. Taking f₀ = 10¹³ Hz, find the required E_b in k_BT units, joules, and eV. (Hint: you need the rate low enough that rate × time < 10⁻⁶.)
3. Two read levels are separated by Δ = 300 mV in the presence of Gaussian noise with σ = 30 mV. What is Δ/σ, and roughly what misread probability does Bench 2.1 give? How much can σ grow before the misread probability reaches 10⁻⁹?
4. A DRAM cell stores 25 fC and is refreshed every 64 ms. If a read fails once the cell has lost 30% of its charge, what is the largest leakage current the cell can tolerate? Express it in electrons per microsecond. What does the smallness of that number tell you about the off-state of the access transistor?
5. In the barrier model, explain in at most three sentences why a technology with a taller barrier is necessarily slower or more energy-hungry to write, and why lowering the write energy by lowering the barrier is a trade with an exponential downside. Where does the third terminal escape this dilemma, and where does it not?

§Symbols and constants